cystech electronics corp. spec. no. : c143v8 issued date : 2016.02.19 revised date : 2016.02.22 page no. : 1/9 mtb020n03kv8 cystek product specification n -channel enhancement mode power mosfet mtb020n03kv8 bv dss 30v i d @v gs =10v, t a =25 c 10a i d @v gs =10v, t c =25 c 18a v gs =10v, i d =10a 12.4m r dson(typ) v gs =4.5v, i d =8a 16.8m features ? low gate charge ? simple drive requirement ? esd protected gate ? pb-free lead plating package equivalent circuit outline mtb020n03kv8 dfn3 3 pin 1 g gate d drain s source ordering information device package shipping MTB020N03KV8-0-T6-G dfn3 3 (pb-free lead plating and halogen-free package) 3000 pcs / tape & reel environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t6 : 3000 pcs / tape & reel,13? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c143v8 issued date : 2016.02.19 revised date : 2016.02.22 page no. : 2/9 mtb020n03kv8 cystek product specification absolute maximum ratings (t c =25c, unless otherwise noted) parameter symbol limits unit drain-source voltage v ds 30 gate-source voltage v gs 20 v continuous drain current @ v gs =10v, t c =25 c 18 continuous drain current @ v gs =10v, t c =100 c 11.4 continuous drain current @ v gs =10v, t a =25 c 10 continuous drain current @ v gs =10v, t a =70 c i d 8 pulsed drain current *1 i dm 72 single pulse avalanche current i as 18 a single pulse avalanche current @ l=0.1mh, v gs =10v, v dd =15v *2 e as 16.2 mj total power dissipation @t c =25 8 total power dissipation @t a =25 p d 2.5 w operating junction and storage temperature range tj, tstg -55~+150 c note : *1 . pulse width limited by maximum junction temperature *2. 100% tested by conditions of l=0.1mh, i as =10a, v gs =10v, v dd =15v thermal data parameter symbol value unit thermal resistance, junction-to-case, max r jc 16 thermal resistance, junction-to-ambient, max r ja 50 * c/w * surface mounted on a 1 in2 pad of 2oz copper. electrical characteristics (tj=25c, unless otherwise noted) symbol min. typ. max. unit test conditions static bv dss 30 - - v v gs =0v, i d =250 a bv dss / tj - 0.02 - v/ reference to 25 , i d =1ma v gs(th) 1 - 2.5 v v ds =v gs , i d =250 a i gss - - 10 v gs =16v, v ds =0v - - 1 v ds =30v, v gs =0v i dss - - 25 a v ds =30v, v gs =0v, tj=125 - 12.4 16 i d =10a, v gs =10v *r ds(on) - 16.8 24 m i d =8a, v gs =4.5v *g fs - 10 - s v ds =5v, i d =10a dynamic ciss - 437 - coss - 62 - crss - 49 - pf v ds =25v, v gs =0v, f=1mhz t d(on) - 5.8 - t r - 18.6 - t d(off) - 33.8 - t f - 11.8 - ns v ds =15v, i d =1a, v gs =10v, r g =6 ?
cystech electronics corp. spec. no. : c143v8 issued date : 2016.02.19 revised date : 2016.02.22 page no. : 3/9 mtb020n03kv8 cystek product specification symbol min. typ. max. unit test conditions qg - 11.4 - qgs - 1.9 - qgd - 3.1 - nc v ds =15v, i d =10a, v gs =10v source drain diode *i s - - 4 *i sm - - 16 a *v sd - 0.79 1.2 v i s =2.3a,v gs =0v *t rr - 9.4 - ns q rr - 4 - nc i f =2.3a,v gs =0v, di f /dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2% recommended soldering footprint unit : mm
cystech electronics corp. spec. no. : c143v8 issued date : 2016.02.19 revised date : 2016.02.22 page no. : 4/9 mtb020n03kv8 cystek product specification typical characteristics typical output characteristics 0 5 10 15 20 25 30 35 40 01234 5 brekdown voltage vs junction temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v 10v,9v,8v,7v,6v,5v vds, drain-source voltage(v) i d , drain current (a) 4.5v 4v 3.5 v v gs =3v static drain-source on-state resistance vs drain current 10 100 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =10v v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 04812162 i dr , reverse drain current(a) v sd , source-drain voltage(v) 0 tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 30 60 90 120 150 024681 0 drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =4.5v, i d =8a r dson @tj=25c : 16.8m typ. v gs =10v, i d =10a r dson @tj=25c : 12.4m typ. v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =10a
cystech electronics corp. spec. no. : c143v8 issued date : 2016.02.19 revised date : 2016.02.22 page no. : 5/9 mtb020n03kv8 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 0 5 10 15 20 25 30 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =10 v v ds =15v gate charge characteristics 0 2 4 6 8 10 02468101214 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =10a v ds =24v v ds =15v maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) t c =25c, tj=150c v gs =10v, r jc =16c/w single pulse dc 100ms r dson limited 100 s 1ms 10ms 1s maximum drain current vs junction temperature 0 2 4 6 8 10 12 14 16 18 20 25 50 75 100 125 150 175 t c , case temperature(c) i d , maximum drain current(a) v gs =10v, r jc =16c/w
cystech electronics corp. spec. no. : c143v8 issued date : 2016.02.19 revised date : 2016.02.22 page no. : 6/9 mtb020n03kv8 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 5 10 15 20 25 30 35 40 012345 v gs , gate-source voltage(v) i d , drain current(a) v ds =10v single pulse power rating, junction to case 0 50 100 150 200 250 300 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t c =25c r jc =16c/w transient thermal response curves 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *r jc (t) 4.r jc =16c/w
cystech electronics corp. spec. no. : c143v8 issued date : 2016.02.19 revised date : 2016.02.22 page no. : 7/9 mtb020n03kv8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c143v8 issued date : 2016.02.19 revised date : 2016.02.22 page no. : 8/9 mtb020n03kv8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c143v8 issued date : 2016.02.19 revised date : 2016.02.22 page no. : 9/9 mtb020n03kv8 cystek product specification dfn3 3 dimension marking: 8-lead dfn3 3 plastic package cystek package code: v8 date code s s s g d d d d b020 n03k *: typical millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.605 0.850 0.026 0.033 b 0.200 0.400 0.008 0.016 a1 0.152 ref 0.006 ref e 0.550 0.750 0.022 0.030 a2 0.000 0.050 0.000 0.002 l 0.300 0.500 0.012 0.020 d 2.900 3.100 0.114 0.122 l1 0.180 0.480 0.007 0.019 d1 2.300 2.600 0.091 0.102 l2 0.000 0.100 0.000 0.004 e 2.900 3.100 0.114 0.122 l3 0.000 0.100 0.000 0.004 e1 3.150 3.450 0.124 0.136 h 0.315 0.515 0.012 0.020 e2 1.535 1.935 0.060 0.076 9 13 9 13 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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